Linear pre-amplifier for radio-frequency power amplifier

ABSTRACT

An amplifier including an input circuit tuned to the frequency to be amplified and receiving as an input the signal to be amplified, a first transistor connected in common base, the emitter of which is coupled to the input circuit and the collector of which provides the output signal of the amplifier, and a feedback circuit feeding back to the base of the transistor a fraction of the output voltage. The feedback circuit includes a capacitive bridge and a second transistor. The input circuit can be used in a first stage of the amplifier or of a mixer.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to RF (radiofrequency) amplifiers, andmore specifically to preamplifiers driving a power amplifier supplyingan antenna.

2. Discussion of the Related Art

FIG. 1 illustrates a conventional RF amplification chain 1. Theamplification chain includes a signal processing block 2, a preamplifier3 driving a power amplifier 4 coupled to an antenna 5. Block 2 includestwo stages for shaping the signal and mixing the signal with the desiredcarrier.

As illustrated in FIG. 2, preamplifier 3 may be followed by a switch 6with two positions, connecting output S of the preamplifier to one oftwo outputs S1 and S2. In certain applications, it is indeed necessaryto interpose two different filters between preamplifier 3 and poweramplifier 4 or to supply, with the same preamplifier, two differentpower amplifiers.

This type of circuit finds an application in fields such as that of cellphones, where the frequency is high, greater than one gigahertz (GHz).

In such fields, some standards use a carrier modulated both in phase andin amplitude. These standards are for example the CDMA (“Code DivisionMultiple Access”) or the W-CDMA (W standing for “Wideband”). In thesefields, RF preamplifiers and amplifiers need to have high performance,needing to be linear both in phase and in amplitude.

In the state of the art, block 2 is an integrated circuit formed on asilicon substrate. Amplifiers 3 and 4 are external units, the activecomponents of which are formed on gallium arsenide substrates. Indeed,gallium arsenide components have a higher cut-off frequency andwithstand higher voltages than silicon components.

FIG. 3 illustrates a conventional preamplifier followed by a switchingcircuit 6. Preamplifier 3, hereafter more simply designated as “theamplifier”, includes an input pad E, coupled to the gate of a transistorT_(A) via an impedance matching circuit 10. Transistor T_(A) is agallium arsenide transistor of FET type, connected in common source. Thegate of transistor T_(A) is biased in direct current by a biasing unit11, not detailed. The source of transistor T_(A) is coupled to a groundpad 13 (GND) via an inductive resistor L. Pad 13 is connected to groundM of the circuit via a connection wire. This connection wire has, in theconsidered frequency range (from 1 to a few GHz), a parasitic bondinginductance. The drain of transistor T_(A) is coupled to a supply pad 15via an impedance matching circuit 14. The connection of pad 15 to asupply line VDD is made by a wire also having a bonding inductance Lb. Acapacitor Cgd is shown between the gate and the drain of transistorT_(A). This capacitor is the stray capacitor between the gate and thedrain of transistor T_(A). The amplifier has its output on the drain oftransistor T_(A).

A switch 6 receives the output of amplifier 3. It has two outputs, S1and S2. Switch 6 is formed by means of four FET-type gallium arsenidetransistors T. The gates of transistors T receive voltages +V or −V viaresistors R, and the circuit is formed so that one of the two outputsreceives the output signal of the amplifier, while the other one isgrounded. The presence of switch 6 in series with the amplifierintroduces losses in the processing chain.

The amplifier of FIG. 3 is formed of a single stage. Because of its lowadaptability, a two-stage circuit is preferred to it, like that of FIG.4.

In FIG. 4, the amplifier includes a first stage, similar to theamplifier of FIG. 3. Impedance matching circuit 14 here has anintermediary output enabling driving the second stage of the amplifier.The second stage is formed of a transistor T_(B), also connected incommon source. Transistor T_(B) is also made of gallium arsenide and ofFET type. The gate of transistor T_(B) receives the output of the firststage. Its source is connected to a ground pad 17, connected to ground Mby a connection having a bonding inductance Lb. Its drain is connectedto an output pad S of the amplifier. It is also connected to animpedance matching circuit 18, itself connected to a supply pad 19,connected to a power supply VDD2 via a bonding inductance Lb. Ifdesired, a switch 6 like that of FIG. 3 is connected on output S.

A disadvantage of the amplifier of FIG. 4 is that it includes galliumarsenide transistors, and accordingly, its integration on the integratedcircuit of processing block 2, having a silicon substrate, isimpossible. Further, the amplifier of FIG. 4 has relatively high powerconsumption. Also, the structure is sensitive to noise, especially noiseintroduced by the bonding inductances, which are difficult to evaluate.

SUMMARY OF THE INVENTION

An object of the present invention is to provide an amplifier operatingof high frequencies that can be integrated on a silicon substrate.

An object of the present invention is to provide a low-power consumptionamplifier.

An object of the present invention is to provide an amplifier that has alow sensitivity to noise, in particular to noise introduced by bondinginductances.

To achieve these and other objects, the present invention provides anamplifier including an input circuit tuned to the frequency to beamplified and receiving, as an input, the signal to be amplified, afirst transistor connected in common base, the emitter of which iscoupled to the input circuit and the collector of which provides theoutput signal of the amplifier, and a feedback circuit feeding back tothe base of said transistor a fraction of the output voltage.

According to an embodiment of the present invention, the feedbackcircuit is formed by a capacitive bridge formed of a first capacitorcoupled between the amplifier output and the base of the firsttransistor, and of a second capacitor connected in series with the firstcapacitor and coupled between the base of the first transistor and avirtual ground node.

According to an embodiment of the present invention, said virtual groundnode is connected to a first supply pad.

According to an embodiment of the present invention, the feedbackcircuit includes a second transistor connected as a follower transistor,the base of which is connected to the feedback circuit, the emitter ofwhich is connected to the base of the first transistor and coupled toground via a first resistor, and the collector of which is connected toa supply voltage.

According to an embodiment of the present invention, the virtual groundnode is coupled to ground via a third capacitor.

According to an embodiment of the present invention, the input circuitis formed of two branches, a first branch of the input circuit includinga second resistor in series with a first inductive resistor and couplingan input of said circuit to the first supply pad, and a second branch ofsaid circuit including a third resistor in series with a fourthcapacitor and coupling the input of the input circuit to the emitter ofthe first transistor.

According to an embodiment of the present invention, the amplifierincludes a network formed of a second inductive resistor and of a fifthcapacitor connected in parallel, to couple the collector of the firsttransistor to a second supply pad, and the emitter of the firsttransistor is coupled to ground by a fourth resistor or a thirdinductive resistor.

According to an embodiment of the present invention, the firsttransistor, its connections, and the feedback circuit are duplicated toform several sets, each set being connected to the input circuit andselectively powered so that the amplifier can provide an output signalon one of several outputs.

According to an embodiment of the present invention, the second branchof the input circuit is also duplicated, each of said sets beingconnected to one of the duplicated second branches of the input circuit,and the capacitors of each of said duplicated second branches havingdifferent capacitance values, so that the tuning of the input circuit isperformed on different frequencies according to the considered secondbranch.

According to an embodiment of the present invention, the input circuitforms part of an input stage including a third transistor connected incommon emitter, receiving on its base the input signal, the emitter ofwhich is coupled to ground by a fourth inductive resistor, and thecollector of which is coupled to the input of the input circuit.

According to an embodiment of the present invention, the input circuitand the third transistor are duplicated a predetermined number n oftimes, the n input circuits being capable of being tuned on closefrequencies to slightly increase the amplifier passband and decrease thesensitivity of the amplifier to dispersions due to the technologicalmanufacturing processes.

According to an embodiment of the present invention, the input circuitforms part of a mixer.

The foregoing and other objects, features and advantages of the presentinvention, will be discussed in detail in the following non-limitingdescription of specific embodiments in connection with the accompanyingdrawings, in which:

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1, previously described, illustrates a simplified diagram of atransmission chain;

FIG. 2, previously described, illustrates an alternative of a portion ofthe transmission chain of FIG. 1;

FIG. 3 illustrates a first example of a conventional amplifier, followedby a switch;

FIG. 4 illustrates a second example of a conventional amplifier;

FIG. 5 illustrates a first embodiment of the present invention;

FIGS. 6A and 6B illustrate alternatives of the embodiment of FIG. 5; and

FIG. 7 illustrates a second embodiment of the present invention.

DETAILED DESCRIPTION

In FIG. 5, an amplifier 20 according to the present invention includessilicon bipolar transistors. A priori, the applicant was dissuaded frommaking this choice since silicon transistors, in the frequency rangeused, have a very low breakdown voltage. For example, for a frequency onthe order of one gigahertz, a silicon transistor with a base in the air(BVCEO) only withstands from 3 to 4 volts between its emitter and itscollector, which can be incompatible with the supply voltages or theexcursions of the signal present in the circuit.

Amplifier 20 is formed of two stages. An input pad E of the amplifier isconnected to the base of an NPN-type silicon bipolar transistor Q1. Thebase of transistor Q1 is biased in direct current by a biasing block 21,which is not detailed. An input impedance 22, formed of a resistor Re inseries with a capacitor Ce, connects the base of transistor Q1 toground. The emitter of transistor Q1 is coupled to a ground pad 24 (GND)via an inductive resistor L. The ground connection of pad 24 introducesa bonding inductance Lb. The collector of transistor Q1 is connected toan impedance matching circuit 26. Circuit 26 includes two branches. Thefirst branch is formed of a resistor R0 in series with an inductiveresistor L0. This branch connects the collector of Q1 to a supply pad 28(VDD1), which introduces a bonding inductance Lb by its connection to asupply line. The second branch of circuit 26 is formed of a resistor R′0in series with a capacitor C0. This branch connects the collector of Q1and a node X2 corresponding to the output of the first stage of theamplifier. It should be noted that, advantageously, input resistor Re ismade in the same material as resistor R0. Thus, technologicaldispersions due to the manufacturing processes will have little effecton the amplifier gain.

The second stage of amplifier 20 includes an NPN silicon bipolartransistor Q2, connected in common base. The applicant has chosen acommon base assembly since this assembly is more linear than a commonemitter assembly when driven in current, despite generally acceptedideas tending to draw away from this choice. Indeed, the common baseassembly is driven in current, and experts would consider that a commonbase assembly would not enable the amplifier to have a sufficient powergain.

The structure of the second stage of amplifier 20 will now be described.Node X2 is connected to the emitter of transistor Q2. The emitter oftransistor Q2 is coupled via a resistor R1 to a node X3 connected to aground pad (GND) 30, which introduces a bonding inductance Lb by itsground connection. Resistor R1 may also be replaced with an inductiveresistor L3 (not shown), which enables avoiding the voltage drop inresistor R1. The collector of transistor Q2 is connected to an outputpad S, forming the output of amplifier 20. The collector of transistorQ2 is coupled, via an inductive resistor Ls connected in parallel with acapacitor Cs, to a supply pad 32 (VDD2). A bonding inductance Lb isintroduced by connection pad 32 to a supply line. Supply pads VDD1 andVDD2 may, outside of the circuit, be connected to a common supply line.The fact that supply pads VDD1 and VDD2 are separate results from thefact that supply voltages VDD1 and VDD2 must be brought to differentpoints of the circuit with different decouplings. Indeed, it isdifficult in this type of circuit to have a single pad to supply bothstages, due to the parasitic inductive resistors brought from one stageto the other, which degrade the isolation, or even cause a risk ofoscillation. The bonding inductances have all been indicated with thesame reference, Lb. However, they can have various values, and are takeninto account for the forming of the amplifier components.

The base of transistor Q2 is, on the one hand, coupled to node X3 by aresistor R2 and, on the other hand, to the emitter of a transistor Q3.Transistor Q3 is a silicon NPN transistor, connected as a followertransistor. The collector of transistor Q3 is connected to supply padVDD2. The base of transistor Q3 is biased by a biasing unit 34, which isnot detailed. The base of transistor Q3 is also coupled to output pad Svia capacitor Ca and to a node X1 connected to supply pad 28 via acapacitor Cb. A capacitor Cd connects nodes X1 and X3.

The operation of amplifier 20 will now be explained in detail, and theadvantages thereof will be disclosed.

Node X1, connected to VDD1, is a ground node from the point of view ofalternating currents, which can be called a “virtual ground”. CapacitorsCa and Cb thus form a capacitive dividing bridge between output S andthis ground. The fraction of output voltage thus brought on thebase-emitter space of transistor Q2 (via transistor Q3), on the onehand, causes a feedback that improves the linearity of the assembly, andon the other hand, sets the output impedance of the assembly to a valuewhich is a multiple of (R0+R′0) without causing any loss as would aresistor in parallel on the output. A capacitive divider has been chosensince it consumes no power and is not noisy.

The second amplifier stage is driven by a current i′c coming from nodeX2. To have a sufficient current drive, impedance matching circuit 26 isa resonant circuit tuned on the amplifier's operating frequency. Acurrent i′c greater than the alternating current i′c provided by thecollector of transistor Q1 is thus obtained, such that i′c # Q.ic, whereQ is the quality factor of the resonant circuit. The ratio between i′cand ic is small, for example equal to two or three, but this currentincrease is sufficient to obtain a sufficient power gain of theamplifier.

It should be noted that the fact of having an output stage including atransistor connected in common base instead of a transistor connected incommon emitter as in prior art enables obtaining greater output voltageson the collector of the output transistor. Indeed, the base-collectorjunction has a breakdown voltage BVCB0 two or three times greater thanthe emitter-collector junction (BVCE0) and, with an equal impedance,more power can be extracted from the stage without risking to damage thetransistor by breakdown.

The present architecture also enables freeing the second stage fromnoise. Indeed, the first stage can bring to the second stage noise vianode X2 and branch R0, L0. This noise is due especially to the bondinginductances, difficult to control, and they can be found at the outputafter having crossed the second stage. To get rid of said noise,capacitor Cb is connected to node X1 and not to ground (GND). If noiseis present on the collector of transistor Q1, it appears at X2 and atX1. Through X2, they are transmitted to the emitter of transistor Q2and, through X1, they are transmitted to the base of transistor Q2 viacapacitor Cb and the base-emitter junction of transistor Q3. The baseand the emitter of transistor Q2 receiving identical noise, voltage Vbebetween the emitter and the base of transistor Q2, which controls thecurrent coming out of the collector of transistor Q2, remainssubstantially steady and independent from noise. To enhance the immunityof the second stage against noise, capacitor Cd connects nodes X1 andX3. Thus, the noise is transmitted to X3. Resistors R1 and R2 both havethe noise on each of their terminals and the current flowingtherethrough is deprived of it.

Another advantage of amplifier 20 is that the biasing of the base oftransistor Q3 is easy to set without modifying the characteristics ofthe rest of the amplifier. Indeed, the voltage applied on the base oftransistor Q3 determines the direct current provided by the emitter oftransistor Q3 and, thereby, the direct current flowing through thecollector of transistor Q2. Now, transistor Q2, which is an outputtransistor, is the most consuming element of the amplifier. When thepower to be provided is high, the direct current flowing throughtransistor Q2 must by high. However, when the power to be provided islow, the direct current flowing through transistor Q2 needs not be high.Since the direct current flowing through transistor Q2 is easy to set inthe amplifier of the present invention, the current consumed by thesecond stage can be adjusted, by acting upon unit 34, by the secondstage according to the required power, with a constant linearity and analmost constant gain.

It should be noted that all the transistors of amplifier 20 are made ofsilicon. Accordingly, amplifier 20 can easily be formed on the samesubstrate as processing block 2.

Further, tests have shown that the amplifier of the present inventionhas higher performance than the amplifier of FIG. 4 in terms oflinearity, of signal-to-noise ratio, and of power consumption (see table1 at the end of the description).

Another advantage of the amplifier of the present invention is that itis easy to adapt, as will be seen hereafter.

FIG. 6A illustrates an alternative embodiment of the amplifier of FIG.5. In FIG. 6A, the second stage of amplifier 20 has not been shown forclarity. The first stage of the amplifier includes three transistors Q1a, Q1 b, and Q1 c, the assembly of which is identical to transistor Q1of FIG. 5. Thus, the base of each of transistors Q1 a, Q1 b, and Q1 c,designated hereafter as Q1 i, is connected to an input pad E, to abiasing block 21, and to an input impedance 22, formed of a resistor Rein series with a capacitor Ce. The emitter of each transistor Q1 i isconnected to supply pad 24 by an inductive resistor L. The collector ofeach transistor Q1 i is connected to supply pad 28 by a first branch R0,L0, of an impedance matching circuit 26. The collector of eachtransistor Q1 i is also connected to node X2 via a second branch R′0, C0of circuit 26.

The alternative of FIG. 6A also provides an input stage replicatingthree times the input stage of FIG. 5. As a result, the incoming currentat node X2 is equal to three times current i′c flowing through branchesR′0, C0 of circuits 26.

Since the incoming current at node X2 determines the output power Ps ofthe amplifier, increasing this current enables increasing the outputpower, with no saturation of the transistors of the first stage.

Another advantage of the amplifier of FIG. 6A is that its power gain isincreased. Indeed, output power Ps is increased, as has just been seen.Further, input power Pe, which is approximately equal to the square ofthe useful voltage of input signal Ve divided by resistance Re (Pe #Ve²/Re), is practically independent from the number of transistors Q1 iof the first stage, the bases of these transistors drawing a negligiblecurrent as compared to the current drawn by Re. Accordingly, the powergain Ps/Pe is also increased.

In an alternative of the amplifier of FIG. 6A, the tuning frequencies ofthe different circuits 26 are slightly shifted. The tuning frequency ofcircuit 26 being determined by product L0.C0, the frequency shift of thedifferent circuits 26 may be performed, for example, by giving slightlydifferent values to the capacitances of the capacitors of the secondbranches of the various circuits 26. This has a double advantage. On theone hand, the amplifier passband will slightly increase and, on theother hand, the amplifier will be less sensitive to possibletechnological manufacturing dispersions, such as those conventionallyaffecting capacitances.

It should be noted that, although FIG. 6A shows an input stage withthree transistors Q1 i, there can be any number of transistors Q1 i, andthe matching circuits 26 associated with these transistors can beidentical or tuned on close frequencies. Also, the emitters oftransistors Q1 i may be connected to a common inductive resistorconnected to ground pad 24, the value of this inductance then beingequal to L/n, n being the number of transistors Q1 i.

FIG. 6B illustrates another alternative embodiment of the amplifier ofFIG. 5, with a switch enabling obtaining two outputs, S and S′.

The amplifier of FIG. 6B first includes an amplifier 20 similar to theamplifier of FIG. 5. It also includes another second stage, identical tothe second stage of amplifier 20. This other second stage includes atransistor Q′2 having its emitter connected to a node X′2. The base oftransistor Q′2 is connected to the emitter of a transistor Q′3 and to anode X′3 via a resistor R′2. The collector of transistor Q′2 isconnected to an output pad S′. It is also connected to a supply padVDD2′ via an inductive resistor L′s in parallel with a capacitor C′s. Abonding inductance Lb is introduced by the connection of pad VDD2′ to asupply line external to the circuit. The collector of transistor Q′3 isconnected to a supply voltage VDD′. The base of transistor Q′3 isconnected to output S′ by a capacitor C′a and to node X′1 by a capacitorC′b. A biasing circuit 34′ biases in direct current the base oftransistor Q′3. Nodes X′1, X′2, and X′3 are respectively connected tonodes X1, X2, X3, which connections are not shown for clarity.

The second stage of the amplifier is thus totally duplicated. Inoperation, one or the other of supply pads VDD2 or VDD2′ are supplied.According to the chosen pad, one output, S or S′, will provide theoutput signal of the amplifier.

The obtained switch is simple and can easily be incorporated into thesame integrated circuit as the amplifier and block 2. Conversely tousual solutions, it introduces no additional losses.

An alternative of the amplifier of FIG. 6B provides significantadvantages. In this alternative (not shown), node X′2 of the secondadditional stage is not connected to node X2, but is connected to aterminal of a capacitor C′0 (not shown), the other terminal of which isconnected to the connection node of resistor R′0 and capacitor C0.Accordingly, the second branch of circuit 26 is formed by R′0 in serieswith C0 for one of the two second stages and by R′0 in series with C′0for the other.

Since the tuning frequency of circuit 26 depends on the value of thecapacitance of the capacitor present in the second branch of thiscircuit, a first second stage tuned to a frequency f1, determined by C0,and a second second stage tuned to a frequency f2, different from f1 anddetermined by C′0, can be had with this alternative embodiment.Amplifier 20 then is a multiple-band or multiple-standard amplifier, theinput signal being provided, after amplification, by the activatedoutput S or S′ with the desired frequency. For example, in an amplifierfor a cell phone, frequency f1 may be on the order of 900 MHz andfrequency f2 may be on the order of from 1.8 to 2 GHz.

It is also possible, instead of using a common resistor R′0 for the twosecond stages, to use a resistor other than R′0 for the second secondstage. The collector of transistor Q1 is then connected to node X2 viaresistor R″0 in series with capacitor C′0 and to node X′2 via a resistorR″0 (not shown) in series with capacitor C′0. This enables, if need be,having a different damping in the two second branches of circuit 26 and,accordingly, a different gain in the two paths of the amplifier.

FIG. 7 shows a second embodiment of the present invention, furtherillustrating the great adaptability of the amplifier of the presentinvention.

In FIG. 7, a mixer stage 40 is followed by a stage corresponding to thesecond stage of the amplifier of FIG. 5. Mixer circuit 40 includestransistors T1 and T2 forming a differential pair. Transistors T1 and T2receive on their respective bases differential signals E1 and E2 from alocal oscillator. The emitters of transistors T1 and T2 areinterconnected and connected to the collector of a third transistor T3.Transistor T3 has its emitter coupled to a ground pad 41 GND having,with respect to ground M, a bonding inductance Lb. The base oftransistor T3 receives a baseband modulated signal or a signal at anintermediary frequency IF which, when mixed to signals E1 and E2,enables obtaining a modulated signal RF. The collector of transistor T1is connected to a supply pad VDD0 having a bonding inductance Lb. Thecollector of transistor T2 is connected to an impedance matching circuit26. Circuit 26 is similar to that of FIGS. 5 and 6. It is formed of twobranches, one including a resistor R0 and an inductive resistor L0 inseries and the other including a resistor R′0 and a capacitor C0 inseries. Branch R0, L0 couples the collector of transistor T2 to a supplypad VDD1 having a bonding inductance Lb. Branch R′0, C0 couples thecollector of transistor T2 to node X2 of the second circuit stage.Supply pad VDD1 is connected to node X1 of the second stage.

Second stage 50 is similar to the second stage of FIGS. 5 and 6, and itincludes the same elements.

Circuit 26 is tuned on the frequency to be amplified. This frequency isthat of the carrier originating from the mixer. Circuit 26 can, in thiscase and to a certain extent, be used as a filter for the signalspresent on the collector of transistor T2 and a filter is spared. At X2,only the signals to be amplified are present and the fact that circuit26 is a tuned circuit enables a sufficient current drive of the secondstage.

In this embodiment, the first amplifier stage is thus replaced by thelast stage of a mixer, impedance matching circuit 26 being used as afilter for the mixer. The assembly, formed on a same integrated circuit,enables substantial silicon surface saving.

Accordingly, the circuit of the present invention is adaptable to manyenvironments. Further, it has higher performance than the circuit ofprior art.

As an example, the following table illustrates values obtained bytesting amplifier 20 of FIG. 5 and the conventional circuit of FIG. 4.

State of the art Frequencies (FIG. 4) Present invention (FIG. 5)  900MHz Gp = 14 dB Gp = 14.5 dB ACPR = −58 dBc ACPR = −60 dBc NFmax = 8 dBNFmax = 4.5 dB Icc = 45 mA Icc = 30 mA 1900 MHz Gp = 14 dB Gp = 14.5 dBACPR = −56 dBc ACPR = −56 dBc NFmax = 8 dB NFmax = 7.5 dB Icc = 55 mAIcc = 38 mA

The comparative tests have been carried out for two frequencies, 900 MHzand 1900 MHz.

Four parameters have been compared:

Gp, the power gain, expressed in decibels (dB);

ACPR (initials of “Adjacent Channel Power Ratio”), which designates theratio in decibels (noted dBc, “c” standing for “carrier”) between aresidual signal found on an adjacent channel and the useful signal; ACPRis all the smaller as the linearity is great;

NFmax, the signal-to-noise ratio, in decibels; and

Icc, the direct current consumed by the circuit, in milliamperes.

At 900 MHz, the measurements have been performed with an output powerequal to 8 dBm (the power in dBm is equal to 10.log[P/P₀], P being thepower in Watts and P₀ equal to 1 milliwatt). At 1900 MHz, themeasurements have been performed with an output power equal to 10 dBm.

Analysis of table 1 indicates the following advantages.

At 900 MHz, for a power gain of the same order, the amplifier of thepresent invention has a much improved linearity (2 addition dB forACPR). The signal-to-noise ratio is better and the current consumptionis lower.

At 1900 MHz, for a power gain of the same order, the current consumptionis lower with the circuit of the present invention, the linearity andthe signal-to-noise ratio being similar to those of prior art.

Other advantages of the amplifier according to the present invention arelisted hereafter.

First, the input, the output, and more generally the structure of theamplifier of the present invention are single-ended. There are manyamplifiers with a differential structure in the prior art, since theyhave a low sensitivity to noise due to the access impedances (mainlybonding inductances) of the various pads, in particular the supply pads.

An advantage of a single-ended structure is that the amplifier consumesless power. Further, in amplifiers with a differential structure, anexternal transformer (“balun”) is connected at the output to obtain asingle output referenced to the ground. This transformer, which isbulky, expensive and further has problems of phase shift and losses, isnot needed in the present invention.

Thus, as compared to an amplifier with a differential structure, theamplifier of the present invention is particularly advantageous, sinceit consumes less power and avoids use of an output transformer, whilehaving a low sensitivity to noise.

Also, since its structure is two-staged, the amplifier according to thepresent invention has a high inverse isolation. Thus, if a signal isinjected on the output, for example due to an imperfect output matching,a very small fraction of the injected signal is transmitted to theinput. This improves the general performance of the amplifier andincreases its stability.

Of course, the present invention is likely to have various alterations,modifications, and improvements which will readily occur to thoseskilled in the art. Thus, amplifier 20 of FIG. 6B has been describedwith a second stage replicated once. Of course, the second stage may bereplicated more than once, and the signals provided by these secondstages may be of different frequencies.

Further, the first stage has been described either as the first stage ofan amplifier, or as the last stage of a mixer. The first stage mayhowever be formed by any circuit including a circuit tuned to thefrequency to be amplified to ensure the connection with the secondstage. Also, the amplifier of the present invention has been describedwith NPN transistors. Those skilled in the art will easily adapt theamplifier to the case where PNP transistors are used.

Such alterations, modifications, and improvements are intended to bepart of this disclosure, and are intended to be within the spirit andthe scope of the present invention. Accordingly, the foregoingdescription is by way of example only and is not intended to belimiting. The present invention is limited only as defined in thefollowing claims and the equivalents thereto.

1. An amplifier including: an input circuit tuned to a frequency to beamplified and receiving, as an input, a signal to be amplified, a firsttransistor connected in common base, an emitter of which is coupled tothe input circuit and a collector of which provides an output signal ofthe amplifier, and a feedback circuit feeding back to the base of saidtransistor a fraction of the output voltage, wherein the feedbackcircuit is formed by a capacitive bridge formed of a first capacitorcoupled between an amplifier output and the base of the firsttransistor, and of a second capacitor connected in series with the firstcapacitor and coupled between the base of the first transistor and avirtual ground node.
 2. The amplifier of claim 1, wherein said virtualground node is connected to a first supply pad.
 3. The amplifier ofclaim 2, wherein the virtual ground node is coupled to ground via athird capacitor.
 4. The amplifier of claim 1, wherein the feedbackcircuit includes a second transistor connected as a follower transistor,a base of which is connected to the feedback circuit, an emitter ofwhich is connected to the base of the first transistor and coupled toground via a first resistor, and a collector of which is connected to asupply voltage.
 5. The amplifier of claim 1, wherein the input circuitis formed of two branches, a first branch of the input circuit includinga second resistor in series with a first inductive resistor and couplingan input of said circuit to the first supply pad, and a second branch ofsaid circuit including a third resistor in series with a fourthcapacitor and coupling the input of the input circuit to the emitter ofthe first transistor.
 6. The amplifier of claim 5, wherein the secondbranch of the input circuit is duplicated to form several sets, each ofsaid sets being connected to one of the duplicated second branches ofthe input circuit, and the capacitors of each of said duplicated secondbranches having different capacitance values, so that the tuning of theinput circuit is performed on different frequencies according to theconsidered second branch.
 7. The amplifier of claim 1, including anetwork formed of a second inductive resistor and of a fifth capacitorconnected in parallel, to couple the collector of the first transistorto a second supply pad, and wherein the emitter of the first transistoris coupled to ground by a fourth resistor or a third inductive resistor.8. The amplifier of claim 1, wherein the first transistor, itsconnections, and the feedback circuit are duplicated to form severalsets, each set being connected to the input circuit and selectivelypowered so that the amplifier can provide an output signal on one ofseveral outputs.
 9. The amplifier of claim 1, wherein the input circuitforms part of an input stage including a third transistor connected incommon emitter, receiving on its base the input signal, the emitter ofwhich is coupled to ground by a fourth inductive resistor, and acollector of which is coupled to the input of the input circuit.
 10. Theamplifier of claim 9, wherein the input circuit and the third transistorare duplicated a predetermined number n of times, the n input circuitsbeing capable of being tuned on close frequencies to slightly increasean amplifier passband and decrease a sensitivity of the amplifier todispersions due to the technological manufacturing processes.
 11. Theamplifier of claim 1, wherein the input circuit forms part of a mixer.12. An amplifier comprising: a first transistor connected in a commonbase configuration, an emitter of which receives an input signal and acollector of which provides an output signal of the amplifier; and afeedback circuit for coupling to a base of the first transistor afraction of the output signal, wherein the feedback circuit comprises afirst capacitor and a second capacitor coupled in series between thecollector of the first transistor and a virtual around node, wherein thefraction of the output signal is coupled from a connection node of thefirst and second capacitors to the base of the first transistor.
 13. Anamplifier as defined in claim 12, wherein said virtual ground node isconnected to a supply pad.
 14. An amplifier as defined in claim 12,wherein the feedback circuit further comprises a second transistorconnected as a follower transistor between the connection node and thebase of the first transistor.
 15. An amplifier as defined in claim 12,wherein said virtual ground node is coupled to ground through a thirdcapacitor.
 16. An amplifier as defined in claim 12, further comprisingan impedance matching circuit tuned to a frequency to be amplified andhaving an input and an output, wherein the output of the matchingcircuit provides the input signal to the emitter of the firsttransistor.
 17. An amplifier as defined in claim 12, further comprisingan inductive resistor and a capacitor connected in parallel between thecollector of the first transistor and a supply pad.
 18. An amplifiercomprising: an impedance matching circuit tuned to a frequency to beamplified and having an input and an output; a first transistorconnected in a common base configuration, an emitter of which is coupledto an output of said matching circuit and a collector of which providesan output signal of the amplifier; an input stage including an inputreceiving an input signal and an output coupled to the input of thematching circuit; and a feedback circuit for coupling to the base ofsaid first transistor a fraction of the output signal, wherein thefeedback circuit comprises a first capacitor and a second capacitorcoupled in series between the collector of the first transistor and avirtual ground node, wherein the fraction of the output signal iscoupled from a connection node of the first and second capacitors to thebase of the first transistor.
 19. An amplifier as defined in claim 18,wherein the virtual ground node is connected to a supply pad.
 20. Anamplifier as defined in claim 19, wherein the virtual ground node iscoupled to ground through a third capacitor.
 21. An amplifier as definedin claim 18, wherein the feedback circuit further comprises a secondtransistor coupled as a follower transistor between the connection nodeand the base of the first transistor.
 22. An amplifier as defined inclaim 18, wherein the matching circuit comprises a first branch couplingan input of the matching circuit to a first supply pad, and a secondbranch coupling the input of the matching circuit to the emitter of thefirst transistor.
 23. An amplifier as defined in claim 18, furtherincluding an inductive resistor and a capacitor connected in parallelbetween the collector of the first transistor and a supply pad.
 24. Anamplifier as defined in claim 18, wherein the input stage includes aninput transistor connected in a common emitter configuration, receivingon a base thereof the input signal and having a collector coupled to theinput of the matching circuit.
 25. An amplifier as defined in claim 18,including two or more input stages and two or more impedance matchingcircuits, each tuned to a slightly different frequency, wherein the twoor more matching circuits have outputs coupled to the emitter of thefirst transistor and wherein the two or more input stages have commoninputs for receiving the input signal.
 26. An amplifier as defined inclaim 25, wherein each of the two or more input stages comprises aninput transistor connected in a common emitter configuration, receivingon a base thereof the input signal and having a collector coupled to aninput of one of the impedance matching circuits.
 27. An amplifier asdefined in claim 18, wherein the input stage comprises a mixer.
 28. Anamplifier as defined in claim 18, including two or more firsttransistors each connected in a common base configuration, each havingan emitter coupled to an output of said matching circuit and each havinga collector which provides an output signal, wherein the amplifier hastwo or more outputs.
 29. An amplifier as defined in claim 28, furtherincluding means for selectively enabling the two or more firsttransistors.
 30. An amplifier as defined in claim 18, wherein the firsttransistor comprises a silicon bipolar transistor.